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4DS MEMORY LIMITED Capital/Financing Update 2021

Aug 16, 2021

64258_rns_2021-08-16_ebd75f09-4cac-4c2f-bbb8-02720195ded2.pdf

Capital/Financing Update

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4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872

+61 8 6377 8043 | [email protected] | www.4dsmemory.com

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ASX RELEASE

17 August 2021

4DS TECHNICAL UPDATE

  • New process breakthroughs have made 4DS’ Interface Switching ReRAM technology fully compatible with state-of-the-art high-volume DRAM and NAND production processes

  • Third Non-Platform Lot wafers yielded an order of magnitude decrease in cell on-resistance, which translates into an up to one order of magnitude boost in read speed

  • Second Platform Lot wafers demonstrated both device-scaling to imec’s minimum geometry and memory switching with an access device on 300mm wafers using state-of-the-art production equipment

  • Third Platform Lot utilizing imec’s megabit memory platform is planned to start late Q3 2021

  • HGST (100% subsidiary of Western Digital Inc) requests technical update to share the detailed results of these two lots

4DS Memory Limited (ASX:4DS) ( 4DS ) (the Company ), is pleased to advise the results of extensive analysis of the Third Non-Platform and the Second Platform Lot wafers.

Background to Non-Platform Lots to date

Since 2020 the focus of Non-Platform Lots has been to fine tune and optimize the process parameters of 4DS’ memory cell technology for Storage Class Memory. Over the past twelve months 4DS has completed two NonPlatform fabrication runs on imec’s state-of the-art production equipment and results of these are set out below. In April 2021 4DS commenced the production of a Third Non-Platform Lot and after extensive analysis the Company now provides a technical update on the Third Non-Platform Lot.

First Non-Platform Lot

The 24 June 2020 announcement stated that 4DS had measured the highest speed and endurance in the First Non-Platform Lot that have ever been recorded by the Company:

  • The best recorded speed at near DRAM read speed exceeds Storage Class Memory requirements without the need for speed crippling error correction;

  • Endurance is two to three times better than previously reported. Actual endurance may be significantly higher but is currently not quantified due to available lab time and test equipment capacity; and

  • The Company also measured retention and the results remain confidential to the Company and its partners until such time as the upper limits of retention can be more accurately defined.

The First Non-Platform Lot was fabricated with process condition contributions from Western Digital and imec.

Second Non-Platform Lot

The 1 February 2021 announcement stated that 4DS had completed its testing of the Second Non-Platform Lot. The data from the Second Non-Platform Lot:

  • Confirmed that the Company has been able to repeat the results for each of the key memory characteristics (speed, endurance, and retention) that were achieved with the First Non-Platform Lot;

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4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872 +61 8 6377 8043 | [email protected] | www.4dsmemory.com

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  • Confirmed that significantly, 19 of the 21 device wafers were functional, a first for the Company (the two nonfunctional wafers were the result of being manufactured outside the imec process window); and

  • Provides 4DS with further valuable insights with respect to how changes in key process parameters affect these key memory characteristics; i.e. which changes increase which memory characteristic.

Results of Third Non-Platform Lot

In this Third Non-Platform Lot, the Company continued to tune the parameters of its Interface Switching ReRAM technology to achieve compatibility with state-of-the-art processes currently used in high volume memory production. Analysis of the wafer results has confirmed that

  • 4DS has been able to repeat the results for each of the key memory characteristics (speed, endurance, and retention) that were achieved with the Second Non-Platform Lot (1 February 2021 announcement”);

  • All 23 device wafers in the lot were functional;

  • 4DS has for the first time demonstrated fabrication of fully crystalline Pr1-xCaxMnO3 (“PCMO”) at temperatures compatible with the advanced processes run in today’s leading-edge high-volume memory DRAM and NAND factories;

  • 4DS has demonstrated that this fully crystalline PCMO material reduces the cell on-resistance by an order of magnitude compared to the PCMO material fabricated in the Second Non-Platform Lot. This reduction in cell on-resistance directly translates into a significant improvement in read speed; and

  • This significant performance improvement also means that full characterization (speed, endurance, retention) of memory cells with this fully crystalline PCMO material requires memory cells operating in a memory array where currents are controlled and limited by access devices.

Dr Guido Arnout, Chief Executive Officer and Managing Director commented “This important milestone in 4DS’ technology development pathway allows us now to focus on doing the same for integration of our ReRAM technology into imec’s megabit memory platform”.

Background to Platform Lots to date

Initial Platform Lot

The 24[th] June 2020 announcement stated that the information gathered from testing the Initial Platform Lot enabled 4DS to identify which process steps required further tuning, to benefit future platform iterations.

The 1[st] February 2021 announcement stated that the positive learnings from the Second Non-Platform Lot would be incorporated into the process conditions for the Second Platform Lot.

Results of Second Platform Lot

A technical issue during the fabrication of the Second Platform Lot at imec affected all wafers and most test structures on each wafer. This technical issue has quickly been identified during detailed analysis and is resolvable going forward with no delays to current timelines as detailed below. Significantly, despite this technical issue, the Second Platform Lot still yielded some critically important results:

  • The Company has for the first time demonstrated scalability of its memory cell to the smallest cell geometries supported on imec’s memory platform on 300mm wafers using state-of-the-art process equipment; and

  • The Company has also for the first time demonstrated memory cell switching using an access device which is a critical step for producing a functional megabit memory array.

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4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872 +61 8 6377 8043 | [email protected] | www.4dsmemory.com

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Drs. Wilbert van den Hoek, Non-Executive Chairman stated “4DS Memory has made significant and industry recognisable progress since my appointment as Chairman in November 2020.The Third Platform Lot production run moves the Company closer to demonstrating its ReRAM technology in a functional megabit memory macro. On behalf of the board of 4DS, I would like to personally thank 4DS’ management and our industry partners, who have under difficult COVID-19 conditions delivered important technical achievements in a timely fashion and within budget”.

The results of the analysis of the Second Platform Lot and the Third Non-Platform Lot bring 4DS and its partners closer to realizing their strategic objective of commercialising the Company’s technology.

Production of the Third Platform Lot

4DS is finalizing the production date of the Third Platform Lot with imec. This lot is expected to start in late Q3 2021.

HGST (Western Digital) Technical Update

Clause 2.2(h) of the 2014 HGST Joint Development Agreement (JDA) requires 4DS to share all technical results with HGST, a 100% subsidiary of Western Digital. HGST have requested a detailed review of the results from these two wafer lots and this meeting is expected to occur as soon as possible.

ENDS

Authorised for release by the Board.

Contact information

Investors: David McAuliffe 4DS Memory +61 408 994 313 [email protected]

About 4DS

4DS Memory Limited (ASX: 4DS), with facilities located in Silicon Valley, is a semiconductor development company of non-volatile memory technology, pioneering Interface Switching ReRAM for next generation gigabyte storage in mobile and cloud. Established in 2007, 4DS owns a patented IP portfolio, comprising 31 USA patents granted and 2 patent applications, which have been developed in-house to create high-density Storage Class Memory. 4DS has a joint development agreement with Western Digital subsidiary HGST, a global storage leader, which accelerates the evolution of 4DS’ technology. 4DS also collaborates with imec, a world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of imec’s widely acclaimed leadership in microchip technology and profound software and information and communication technology expertise makes them unique.

For more information, please visit www.4dsmemory.com.

Disclaimer

This release contains certain forward-looking statements that are based on the Company’s management’s beliefs, assumptions and expectations and on information currently available to management. Such forward looking statements involve known and unknown risks, uncertainties, and other factors which may cause the actual results or performance of 4DS to be materially different from the results or performance expressed or implied by such forward looking statements. Such forward looking statements are based on numerous assumptions regarding the Company’s present and future business strategies and the political and economic environment in which 4DS will operate in the future, which are subject to change without notice. Past performance is not necessarily a guide to future performance and no representation or warranty is made as to the likelihood of achievement or reasonableness of any forward-looking statements or other forecast. To the full extent permitted by law, 4DS and its directors, officers, employees, advisers, agents and intermediaries disclaim any obligation or undertaking to release any updates or revisions to information to reflect any change in any of the information contained in this release (including, but not limited to, any assumptions or expectations set out in the release).

You should not place undue reliance on these forward- looking statements. Except as required by law or regulation (including the ASX Listing Rules) we undertake no obligation to update these forward- looking statements.

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