4DS MEMORY LIMITED — Capital/Financing Update 2017

Jun 12, 2017

4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872

+61 8 6377 8043 | david@4dsmemory.com |www.4dsmemory.com

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ASX RELEASE

13 June 2017

4DS Interface Switching ReRAM reaches read speed comparable to DRAM

• 4DS reaches read speed comparable to DRAM

• 4DS does not require speed crippling error correction

• Reaching read speed comparable to DRAM is a breakthrough for any ReRAM

4DS Memory Limited (ASX:4DS) ( 4DS or the Company ) is pleased to report the ground-breaking technical achievements for its Interface Switching ReRAM technology below.

4DS reaches read speed comparable to DRAM

4DS is pleased to report that the architectural changes the Company made to its patented Interface Switching ReRAM – for which additional patents are pending – improve read access time so dramatically that it is now comparable to DRAM.

4DS does not require speed crippling error correction

Most emerging memory technologies have been reported to struggle with inherently high bit error rates – frequently reading out incorrect data. In most cases this is caused by large random cell current fluctuations. To reliably retrieve the original data, complex time consuming error correction techniques are required which negatively affect read access time and thus cripple read speed.

In what may be an industry first for ReRAM, the Company is pleased to report that in an extensive current fluctuation study, the Company has never observed any large current fluctuations. As a result, the Company’s Interface Switching ReRAM will, at most, only need basic error correction with negligible impact on read speed.

Reaching read speed comparable to DRAM is a breakthrough for any ReRAM

Chief Executive Officer and Managing Director, Dr Guido Arnout, said: “Achieving a ReRAM read speed comparable to DRAM without the need for speed crippling error correction is unique and one of the most significant achievements in the Company’s history. This enables high density Storage Class Memory with effective read speeds comparable to DRAM, something unattainable until now.”

2017 Commentary

Dr Arnout said, “During the past 12 months, the Company has achieved scalability to 40nm, significantly boosted endurance, and now reached read speed comparable to DRAM. These technical achievements position the Company uniquely in the memory development field with huge potential for Storage Class Memory – an emerging industry segment that leading memory companies recognize as an extremely important segment in which to establish a competitive edge.”

4DS looks forward to informing shareholders of continued technical progress, like data retention, and any progress in its business development activities.

A positioning of this announcement in the broader industry context is provided in the Appendix.

4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872

+61 8 6377 8043 | david@4dsmemory.com |www.4dsmemory.com

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Chief Executive Officer Remuneration

Dr Arnout has been with 4DS since December 2013 for an equity position in lieu of salary until August 2015. The Board, after a review of his role and the Company’s progress, amended his annual salary from US$185,000 to US$270,000 per annum. The amended remuneration will be effective from 1 May 2017.

Contact information

Investors:	Media:
David McAuliffe Executive Director 4DS Memory	Harrison Polites Media & Capital Partners
+61 408 994 313	+61 409 623 618
david@4dsmemory.com	harrison.polites@mcpartners.com.au

About 4DS

4DS Memory Limited (ASX: 4DS), with facilities located in Silicon Valley, is a semiconductor development company of non-volatile memory technology, pioneering Interface Switching ReRAM for next generation gigabyte storage in mobile and cloud. Established in 2007, 4DS owns a patented IP portfolio, comprising 18 US patents granted and 5 patents pending, which has been developed in-house to create high density Storage Class Memory. 4DS has a joint development agreement with Western Digital subsidiary HGST, a global storage leader, which accelerates the evolution of 4DS’ technology.

For more information, please visit www.4dsmemory.com.

Disclaimer

This release contains certain forward-looking statements that are based on the Company’s management’s beliefs, assumptions and expectations and on information currently available to management. Such forward-looking statements involve known and unknown risks, uncertainties, and other factors which may cause the actual results or performance of 4DS to be materially different from the results or performance expressed or implied by such forward-looking statements. Such forward-looking statements are based on numerous assumptions regarding the Company’s present and future business strategies and the political and economic environment in which 4DS will operate in the future, which are subject to change without notice. Past performance is not necessarily a guide to future performance and no representation or warranty is made as to the likelihood of achievement or reasonableness of any forward-looking statements or other forecast. To the full extent permitted by law, 4DS and its directors, officers, employees, advisers, agents and intermediaries disclaim any obligation or undertaking to release any updates or revisions to information to reflect any change in any of the information contained in this release (including, but not limited to, any assumptions or expectations set out in the release).

You should not place undue reliance on these forward-looking statements. Except as required by law or regulation (including the ASX Listing Rules) we undertake no obligation to update these forward-looking statements.

4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872

+61 8 6377 8043 | david@4dsmemory.com |www.4dsmemory.com

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Appendix: Positioning of this announcement in the broader industry context

Storage Class Memory is the vast space between DRAM and NAND FLASH

The two most pervasive memories of today are DRAM and NAND FLASH – each selling roughly US$40 billion per year – but with properties that could not be further apart.

Some of the key properties are: endurance (the number of times data may be safely written to a given memory cell), latency (read access time), retention (how long a memory cell can retain its data – with power for volatile memory and without power for non-volatile memory), and cost (lower with higher density).

DRAM offers by far the best endurance, is super-fast but is fundamentally a volatile memory that must constantly refresh its contents to avoid data loss.

In sharp contrast, NAND FLASH is a non-volatile memory which offers years of data retention but is much slower than DRAM and its endurance is very limited. The number of times a block of cells is written must therefore be monitored constantly. The data stored in blocks (of memory cells) at risk of wear-out must be relocated automatically to less frequently written free space to avoid wear-out or data loss.

In addition, DRAM is more than 10 times more expensive per bit than NAND FLASH, with NAND FLASH getting cheaper by the day. This is in large part due to the advent of 3D NAND FLASH – the ability to stack multiple 2D memory layers on a single memory chip. DRAM, on the other hand, is currently limited to a single 2D structure.

Over the history of computing, the speed and power efficiency of systems have benefited greatly each time the industry adopted a new kind of memory in the memory hierarchy. As an example, not that long ago, laptops were all using slow mechanical spinning hard disk drives and now increasingly use SSDs (Solid State Drives of NAND FLASH) for local storage and spinning hard disk drives for long-term backup.

The properties of DRAM and NAND FLASH are in fact so far apart that over a decade ago, IBM Almaden Research introduced the term “Storage Class Memory” to describe this vast domain between DRAM and NAND FLASH which offers room for many successful new memory products with very different properties.

The quest for Storage Class Memory with DRAM-like latency

Since it is increasingly difficult to further improve the properties of DRAM while the cost per bit of NAND FLASH keeps dropping, the “holy grail” of Storage Class Memory has become the design of memory with properties much closer to DRAM than to NAND FLASH.

4DS has been on this quest to get closer to DRAM too and has been tuning the properties of its patented Interface Switching ReRAM to get the latency of its technology comparable to DRAM.

A key asset of Interface Switching ReRAM is that – unlike Filamentary ReRAM technologies – its cell currents scale with geometry: smaller cells yield lower cell currents, and lower currents can flow reliably through narrow on-chip wires. Small cells and narrow on-chip wires are required to achieve high density memories. However, lower cell currents also translate into longer latency. In order to achieve DRAM latency in high density Storage Class Memory, the cell currents of small cell sizes need to match the required latency.

Through extensive measurements and analysis of its patented Interface Switching ReRAM cells fabricated in different cell sizes, the Company concluded that cell currents needed to be boosted by an order of magnitude to reach DRAM latency at the cell size targeted by the industry for Storage Class Memory.

4DS Memory Limited | ABN 43 145 590 110 Level 2, 50 Kings Park Road, West Perth WA 6005 PO Box 271, West Perth WA 6872

+61 8 6377 8043 | david@4dsmemory.com |www.4dsmemory.com

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4DS is pleased to report that the architectural changes the Company made to its Interface Switching ReRAM – for which additional patents are pending – improve the inherent memory latency (read access time) so dramatically that it is now comparable to DRAM.

Latency is affected by the amount of error correction required

However, a short cell latency is not enough. The latency that matters is the sum of the inherent memory latency and the time required to detect and correct any read errors, through error correction circuitry (ECC) necessary to reliably detect the state of ReRAM cells over time. Both must be super- fast to achieve DRAMlike latency. Most PCs, tablets, and smartphones do not need ECC DRAM.

Most emerging memory technologies (Filamentary ReRAM, PCM, CBRAM™, Ox-RAM, …) have been reported to struggle with inherently high bit error rates – frequently reading out incorrect data. In most cases this is caused by large random cell current fluctuations. To reliably retrieve the original data, complex time consuming error correction techniques are required which negatively affect read access time and read speed.

Filamentary ReRAM technologies essentially switch at a single point making them susceptible to irregularities in the switching region – even small changes within the switching region will result in very large current changes. However, due to the inherently robust nature of Interface Switching technology, the entire interface area is involved in switching, thereby dramatically reducing the influence of random irregularities within the switching region and thus significantly minimizing current fluctuations.

In what may be an industry first for ReRAM, the Company is pleased to report that in an extensive current fluctuation study, the Company has never observed any large current fluctuations.

As a result, the Company’s Interface Switching ReRAM will, at most, only need basic error correction with negligible impact on read speed. Furthermore, simpler error correction improves effective bit density (lowering bit cost) and reduces power consumption.

In other words, the latency of the Company’s Interface Switching ReRAM is dominated by the inherent memory latency and not by the time overhead of error correction. This is very significant in the quest for ReRAMs with DRAM-like latency.

The Company is not aware of any other ReRAM technology that can make the same latency claim.